microcontrollers:msp430_clock_systems_and_timers
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| microcontrollers:msp430_clock_systems_and_timers [2024/10/31 13:36] – ibchadmin | microcontrollers:msp430_clock_systems_and_timers [2024/10/31 13:38] (current) – [MSP430: Clock Systems and Timers] ibchadmin | ||
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| * Low-cost applications with less-constrained clk accuracy requirement | * Low-cost applications with less-constrained clk accuracy requirement | ||
| * Allows user to select best balance of performance and power consumption. | * Allows user to select best balance of performance and power consumption. | ||
| - | * | + | |
| Clock module can operate with or without external components like crystals and resonators. | Clock module can operate with or without external components like crystals and resonators. | ||
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| Clock source for each clock signal is selected using the SEL register. | Clock source for each clock signal is selected using the SEL register. | ||
| ACLK, MCLK and SMCLK use SELAx, SELMx, and SELSx respectively to select clock source. | ACLK, MCLK and SMCLK use SELAx, SELMx, and SELSx respectively to select clock source. | ||
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| + | ===== Clock Configuration ===== | ||
| + | |||
| + | There are 7 Clk system control registers: | ||
| + | * CSCTL0: Enables access control to other registers when correct password key is set. e.g. CSCTL0 = CSKEY | ||
| + | * CSCTL1: Enables DCO range and frequency selection (DCORSEL & DCOFSEL) | ||
| + | * CSCTL2: Used for setting clock source for ACLK, MCLK and SMCLK. | ||
| + | * CSCTL3: Used setting frequency divider for those clock sources. It could be 1,2,4,8,16 or 32. | ||
| + | * CSCTL4: Sets the HFXT and LFXT oscillator ON or OFF. | ||
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microcontrollers/msp430_clock_systems_and_timers.1730381811.txt.gz · Last modified: 2024/10/31 13:36 by ibchadmin